HD6475328CG Datasheet, PDF (349/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description

Mnemonic
Operation
Branch- Bcc
If condition is true then
ing
PC + disp → PC
instruc-
else next;
tions
Mnemonic
BRA
(BT)
BRN
(BF)
BHI
BLS
Description
Always (True)
Never (False)
HIgh
Low or Same
Bcc
BCS
BNE
BEQ
BVC
BVS
BPL
(BHS)
(BLO)
Carry Clear (High or Same)
Carry Set (LOw)
Not Equal
EQual
oVerflow Clear
oVerflow Set
PLus
BMI
BGE
BLT
BGT
BLE
MInus
Greater or Equal
Less Than
Greater Than
Less or Equal
JMP
Effective address → PC
PJMP
Effective address → CP, PC
BSR
PC → @ – SP
PC + disp → PC
JSR
PC → @ – SP
Effective address → PC
PJSR
PC → @ – SP
CP → @ – SP
Effective address → CP, PC
RTS
@ SP + → PC
PRTS
@ SP + → CP
@ SP + → PC
RTD
@ SP + → PC
SP + #IMM → SP
PRTD @ SP + → CP
@ SP + → PC
SP + #IMM → SP
SCB
If condition is true then next;
SCB/F else Rn – 1 → Rn;
SCB/NE If Rn = –1 then next;
SCB/EQ
else PC + disp → PC;
Mnemonic Description Condition
SCB/F
False
SCB/NE
Not Equal
Z=0
SCB/EQ
Equal
Z=1
340
Size CCR Bit
B/W N Z V C
— ————
Condition
True
False
C∨Z=0
C∨Z=0
C=0
C=1
Z=0
Z=1
V=0
V=1
N=0
N=1
N⊕V=0
N⊕V=1
Z ∨ (N ⊕ V) = 0
Z ∨ (N ⊕ V) = 1
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