HD6475328CG Datasheet, PDF (169/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description

9.4.2 Port 3 Registers
Register Configuration: Table 9-6 lists the registers of port 3.
Table 9-6 Port 3 Registers
Name
Port 3 data direction register
Port 3 data register
Abbreviation
P3DDR
P3DR
Read/Write
W
R/W
Initial Value
H'00
H'00
Address
H'FF84
H'FF86
1. Port 3 Data Direction Register (P3DDR)—H'FF84
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
P37DDR P36DDR P35DDR P34DDR P33DDR P32DDR P31DDR P30DDR
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
P3DDR is an 8-bit register that selects the direction of each pin in port 3.
Single-Chip Mode: A pin functions as an output pin if the corresponding bit in P3DDR is set
to “1,” and as an input pin if the bit is cleared to “0.”
P3DDR can be written but not read. An attempt to read this register does not cause an error, but
all bits are read as “1,” regardless of their true values.
At a reset and in the hardware standby mode, P3DDR is initialized to H'00, making all eight pins
input pins. P3DDR is not initialized in the software standby mode, so if a P3DDR bit is set to “1”
when the chip enters the software standby mode, the corresponding pin continues to output the
value in the port 3 data register.
Expanded Modes: P3DDR is not used.
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