HD6475328CG Datasheet, PDF (407/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description

ADCSR—A/D Control/Status Register
H'FFE8
A/D
Bit
Initial value
Read/Write
7
ADF
0
R/(W)*
6
ADIE
0
R/W
5
ADST
0
R/W
4
SCAN
0
R/W
3
CKS
0
R/W
2
CH2
0
R/W
1
CH1
0
R/W
0
CH0
0
R/W
CH2 CH1 CH0
00
0
0
1
1
0
11
00
1
0
1
1
0
11
Channel Select
Single Mode Scan Mode
AN0
AN0
AN1
AN0, AN1
AN2
AN0 to AN2
AN3
AN0 to AN3
AN4
AN4
AN5
AN4, AN5
AN6
AN4 to AN6
AN7
AN4 to AN7
Clock Select
0 Conversion time = 274 states
1 Conversion time = 138 states
Scan Mode
0 Single mode
1 Scan mode
A/D Start
0 A/D conversion is halted.
1 1. Single mode: One A/D conversion is performed,
then this bit is automatically cleared to 0.
2. Scan mode: A/D conversion starts and continues
cyclically on all selected channels until 0 is
written in this bit.
A/D Interrupt Enable
0 The A/D interrupt request (ADI) is disabled.
1 The A/D interrupt request (ADI) is enabled.
A/D End Flag
0 Cleared from 1 to 0 when:
1. The chip is reset or enters a standby mode.
2. CPU reads ADF = 1, then writes 0 in ADF.
3. DTC is served by ADI.
1 Set to 1 at the following times:
1. Single mode: at the completion of A/D conversion.
2. Scan mode: when all selected channels have been converted.
* Only writing of 0 to clear the flag is enabled.
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