|
HD6475328CG Datasheet, PDF (334/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description | |||
|
◁ |
Table 20-6 Timing Conditions of On-Chip Supporting Modules
Conditions: VCC = 5.0V ±10%, AVCC = 5.0V ±10%, ø = 0.5 to 10MHz, VSS = 0V
Ta = â20 to +75ËC (Regular Specifications)
Ta = â40 to +85ËC (Wide-Range Specifications)
6MHz
8MHz
10MHz
Measurement
Item
Symbol Min Max Min Max Min Max Unit Conditions
FRT Timer output delay time
tFTOD â 100 â 100 â 100 ns See figure 20-14
Timer input setup time
tFTIS
50 â
50 â 50 â ns
Timer clock input setup time
tFTCS
50 â
50 â
50 â ns See figure 20-15
Timer clock pulse width
tFTCWL,
tFTCWH 1.5 â
1.5 â
1.5 â tcyc
TMR Timer output delay time
tTMOD â 100 â 100 â 100 ns See figure 20-16
Timer clock input setup time
tTMCS 50 â
50 â
50 â ns See figure 20-17
Timer clock pulse width
tTMCWL,
tTMCWH 1.5 â
1.5 â
1.5 â tcyc
Timer reset input setup time
tTMRS 50 â
50 â
50 â ns See figure 20-18
PWM Timer output delay time
tPWOD â 100 â 100 â 100 ns See figure 20-19
SCI Input clock cycle
(Async) tScyc
2â
2â
2 â tcyc See figure 20-20
(Sync)
4â
4â
4â
tcyc
Input clock pulse width
tSCKW 0.4 0.6 0.4 0.6 0.4 0.6 tScyc
Transmit data delay time (Sync) tTXD
â 100 â 100 â 100 ns See figure 20-21
Receive data setup time (Sync) tRXS
100 â
100 â 100 â ns
Receive data hold time (Sync) tRXH
100 â
100 â
100 â ns
Port Output data delay time
tPWD â 100 â 100 â 100 ns See figure 20-13
Input data setup time
tPRS
50 â
50 â 50 â ns
Input data hold time
tPRH
50 â
50 â
50 â ns
⢠Measurement Conditions for AC Characteristics
5V
H8/532
output pin
RH
C
RL
CC==9900ppFF: P: 1P,1P,2P, P2,3,PP34,,PP45,, PP65, P6
==3300pFp:FP: 7P,7P,9P9
RRLL= 2=.42.k4â¦k
RRHH= =121k2â¦k
IInnppuut/to/uotuptuptutitmtiinmginregferreefnecreelnecveelslevels
LLooww: : 0.80V.8V
HHigighh: :2.02V.0V
Figure 20-3 Output Load Circuit
325
|
▷ |