HD6475328CG Datasheet, PDF (149/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description

Figure 7-2 shows the timing of the operation in this mode when the wait count is 1 (WC1 = “0,”
WC0 = “1”).
T2 state or T3
T1
T2
TW
T3
ø
A19 –A0
RD, AS,
DS (Read)
D7 –D0
WR, DS
(Write)
D7 –D0
Read data
Off-chip address
Read data
Write data
Figure 7-2 Programmable Wait Mode
7.3.2 Pin Wait Mode
The pin wait mode is selected when WMS1 = “1” and WMS0 = “0.”
In this mode the WAIT function of the P14 /WAIT pin is used automatically.
The number of wait states indicated by bits WC1 and WC0 are inserted into any bus cycle in
which the CPU or DTC accesses an off-chip address. In addition, wait states continue to be
inserted as long as the WAIT pin is held low. In particular, if the wait count is 0 but the WAIT pin
is Low at the rising edge of the ø clock in the T2 state, wait states are inserted until the WAIT pin
goes High.
This mode is useful for inserting four or more wait states, or when different external devices
require different numbers of wait states.
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