HD6475328CG Datasheet, PDF (185/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description

Port 7 has Schmitt inputs. Outputs from port 7 can drive one TTL load and a 30pF capacitive
load. They can also drive a Darlington transistor pair.
P77 (input/output) / FTOA1 (output)
P76 (input/output) / FTOB3 (output) / FTCI3 (input)
P75 (input/output) / FTOB2 (output) / FTCI2 (input)
Port
P74 (input/output) / FTOB1 (output) / FTCI1 (input)
7
P73 (input/output) / FTI3 (input) /TMRI (input)
P72 (input/output) / FTI2 (input)
P71 (input/output) / FTI1 (input)
P70 (input/output) / TMCI (input)
Figure 9-19 Pin Functions of Port 7
9.8.2 Port 7 Registers
Register Configuration: Table 9-12 lists the registers of port 7.
Table 9-12 Port 7 Registers
Name
Port 7 data direction register
Port 7 data register
Abbreviation
P7DDR
P7DR
Read/Write
W
R/W
Initial Value
H'00
H'00
Address
H'FF8C
H'FF8E
1. Port 7 Data Direction Register (P7DDR)—H'FF8C
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
P77DDR P76DDR P75DDR P74DDR P73DDR P72DDR P71DDR P70DDR
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
P7DDR is an 8-bit register that selects the direction of each pin in port 7. A pin functions as an
output pin if the corresponding bit in P7DDR is set to “1,” and as an input pin if the bit is cleared
to “0.”
P7DDR can be written but not read. An attempt to read this register does not cause an error, but
all bits are read as “1,” regardless of their true values.
At a reset and in the hardware standby mode, P7DDR is initialized to H'00, setting all pins for
input. P7DDR is not initialized in the software standby mode, so if a P7DDR bit is set to “1”
when the chip enters the software standby mode, the corresponding pin continues to output the
value in the port 7 data register.
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