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HD6475328CG Datasheet, PDF (23/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description | |||
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Table 1-1 Features
Feature
CPU
Memory
16-Bit free-
running
timer (FRT)
(3 channels)
8-Bit timer
(1 channel)
PWM timer
(3 channels)
Watchdog
timer (WDT)
(1 channel)
Description
General-register machine
⢠Eight 16-bit general registers
⢠Five 8-bit and two 16-bit control registers
High speed
⢠Maximum clock rate: 10MHz (oscillator frequency: 20MHz)
Expanded operating modes supporting external memory
⢠Minimum mode: up to 64K-byte address space
⢠Maximum mode: up to 1M-byte address space
Highly orthogonal instruction set
⢠Addressing modes and data size can be specified independently for
each instruction
1.5 Addressing modes
⢠Register-register operations
⢠Register-memory operations
Instruction set optimized for C language
⢠Special short formats for frequently-used instructions and addressing modes
⢠1K-Byte high-speed RAM on-chip
⢠32K-Byte programmable or masked ROM on-chip
Each channel provides:
⢠1 free-running counter (which can count external events)
⢠2 output-compare registers
⢠1 input capture register
⢠One 8-bit up-counter (which can count external events)
⢠2 time constant registers
⢠Generates pulses with any duty ratio from 0 to 100%
⢠Resolution: 1/250
⢠An overflow generates a nonmaskable interrupt
⢠Can also be used as an interval timer
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