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| HD6475328CG Datasheet, PDF (296/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description | |||
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Steps 2 to 7 can now be repeated by setting the ADST bit to 1 again.
If the data transfer enable (DTE) bit is set to 1, the interrupt is served by the data transfer
controller (DTC). Steps 4 to 7 then change as follows.
4â. The DTC is started.
5â. The DTC automatically clears the ADF bit to 0.
6â. The DTC transfers the A/D conversion result from ADDRB to a specified destination address.
7â. The DTC ends.
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