HD6475328CG Datasheet, PDF (217/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description

Synchronization on External Clock Source: When the external clock source is selected, the
free-running timers can be synchronized by halting their external clock inputs, then writing
identical values in their free-running counters.
10.7 Sample Application
In the example below, one free-running timer channel is used to generate two square-wave outputs
with a 50% duty factor and arbitrary phase relationship. The programming is as follows:
1. The CCLRA bit in the TCSR is set to “1.”
2. Each time a compare-match interrupt occurs, software inverts the corresponding output level
bit in the TCSR.
H’FFFF
OCRA
OCRB
H’0000
FRC
Clear counter
FTOA pin
FTOB pin
Figure 10-11 Square-Wave Output (Example)
10.8 Application Notes
Application programmers should note that the following types of contention can occur in the free-
running timers.
Contention between FRC Write and Clear: If an internal counter clear signal is generated
during the T3 state of a write cycle to the lower byte of a free-running counter, the clear signal
takes priority and the write is not performed.
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