HD6475328CG Datasheet, PDF (117/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description

5.1.2 Block Diagram
Figure 5-1 shows the block configuration of the interrupt controller.
NMI
Interrupt
request
signals
from
modules
IRQ0
IRQ1
FRT1
FRT2
FRT3
8 bits timer
SCI
A/D converter
Interrupt controller
NMI
request
Interrupt
request
DTC
request
I 2 I 1 I 0 SR (CPU)
FRT: 16 Bits Free Running Timer
SCI: Serial Communication Interface
SR: Status Register
IPR: Interrupt Priority Register
DTE: Data Transfer Enable Register
Figure 5-1 Interrupt Controller Block Diagram
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