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HD6475328CG Datasheet, PDF (322/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description | |||
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Oscillator
ø
NMI
NMEG
SSBY
Clock setting time
NMI interrupt handling
NMIEG = 1
SSBY = 1
SLEEP instruction
Software standby mode
(Power-down state)
NMI interrupt handling
WDT interval (tOSC2 )
Clock start-up
time
WDT overflow
Figure 18-1 NMI Timing of Software Standby Mode (Application Example)
18.3.5 Application Notes
(1) The I/O ports retain their current states in the software standby mode. If a port is in the High
output state, its output current is not reduced in the software standby mode.
(2) If the software standby mode is entered under either condition  or condition  below in a
ZTAT version of the H8/532, current dissipation is greater than in normal standby mode (ICC =
100 to 300µA). This problem does not occur in H8/532 versions with masked ROM.
 In single-chip mode (mode 3): if software standby mode is entered after even one
instruction not stored in on-chip ROM has been fetched (e.g. from on-chip RAM).
 In expanded mode with on-chip ROM enabled (mode 2): if software standby mode is
entered after even one instruction not stored in on-chip ROM has been fetched (e.g. from
external memory or on-chip RAM).
This problem does not occur in the expanded mode when on-chip ROM is disabled (mode 1).
In applications in which the additional standby current must be avoided, take one of the
following actions:
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