MC9S12NE64CPVE Datasheet, PDF (91/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64 Device Overview

Functional Description
2.4.1.3.1 Erase Verify Command
The erase verify operation is used to confirm that a Flash block is erased. After launching the erase verify
command, the CCIF flag in the FSTAT register will set after the operation has completed unless a second
command has been buffered. The number of bus cycles required to execute the erase verify operation is
equal to the number of addresses in the Flash block plus 12 bus cycles as measured from the time the
CBEIF flag is cleared until the CCIF flag is set. The result of the erase verify operation is reflected in the
state of the BLANK flag in the FSTAT register. If the BLANK flag is set in the FSTAT register, the Flash
memory is erased.
Read: Register FCLKDIV
Clock Register
Loaded
Check
Bit FDIVLD set? ^no
yes
Write: Register FCLKDIV
1.
Write: Flash Block Address
and Dummy Data
2.
Write: Register FCMD
Erase Verify Command 0x05
3.
Write: Register FSTAT
Clear bit CBEIF 0x80
Read: Register FSTAT
Access
Error Check
Bit
ACCERR
yes
Set?
no
NOTE: command write sequence
aborted by writing 0x00 to
FSTAT register.
NOTE: command write sequence
aborted by writing 0x00 to
FSTAT register.
Write: Register FSTAT
Clear bit ACCERR 0x10
Bit Polling for
Command
Completion Check
Bit
CCIF
no
Set?
yes
Bit
BLANK
no
Set?
yes
Read: Register FSTAT
Flash Block Not Erased;
Mass Erase Flash Block
EXIT
Figure 2-22. Example Erase Verify Command Flow
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
91