MC9S12NE64CPVE Datasheet, PDF (411/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64 Device Overview

Memory Map and Register Definition
Table 15-8. MODC, MODB, and MODA Write Capability¹
MODC MODB MODA
Mode
MODx Write Capability
0
0
0
Special single chip
MODC, MODB, and MODA
write anytime but not to 110²
0
0
1
0
1
0
Emulation narrow
Special test
No write
MODC, MODB, and MODA
write anytime but not to 110⁽²⁾
0
1
1
1
0
0
Emulation wide
Normal single chip
1
0
1
Normal expanded narrow
1
1
0
Special peripheral
No write
MODC write never,
MODB and MODA write once
but not to 110
No write
No write
1
1
1
Normal expanded wide
No write
1 _{No writes to the MOD bits are allowed while operating in a secure mode. For more details, refer to the device}
overview chapter.
2 _{If you are in a special single-chip or special test mode and you write to this register, changing to normal sin-}
gle-chip mode, then one allowed write to this register remains. If you write to normal expanded or emulation
mode, then no writes remain.
15.3.2.10 Pull Control Register (PUCR)
R
W
Reset¹
7
6
0
PUPKE
5
4
3
0
0
PUPEE
2
1
0
0
PUPBE
PUPAE
1
0
0
1
0
0
0
0
NOTES:
1. The default value of this parameter is shown. Please refer to the device overview chapter to deter-
mine the actual reset state of this register.
= Unimplemented or Reserved
Figure 15-14. Pull Control Register (PUCR)
Read: Anytime (provided this register is in the map).
Write: Anytime (provided this register is in the map).
This register is used to select pull resistors for the pins associated with the core ports. Pull resistors are
assigned on a per-port basis and apply to any pin in the corresponding port that is currently configured as
an input. The polarity of these pull resistors is determined by chip integration. Please refer to the device
overview chapter to determine the polarity of these resistors.
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
411