MC9S12NE64CPVE Datasheet, PDF (365/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64 Device Overview

Memory Map and Register Descriptions
ACKR — Acknowledge Bit Received
1 = Acknowledge bit has been received from the link partner
0 = Acknowledge bit has not been received since the last access of this register. (ACK bit 14 of the
auto-negotiation link partner ability register was set by receipt of link code word)
PGR — Page Received
1 = A new page has been received from the link partner
0 = A new page has not been received from the link partner since the last access of this register (Bit
1 was set by a page received event)
LKC — Link Changed
1 = The link status has changed since the last access of this register
0 = The link status has not changed since the last access of this register. (LNK bit 14 of the
proprietary status register was changed)
ANC — Auto-Negotiation Changed
1 = The auto-negotiation status has changed since the last access of this register
0 = The auto-negotiation status has not changed since the last access of this register
PDF — Parallel Detect Fault
1 = A parallel-detect fault has occurred since the last access of this register
0 = A parallel-detect fault has not been detected since the last access of this register. (Bit 4 was set
by rising edge of parallel detection fault)
RMTF — Remote Fault
1 = A remote fault condition has been detected since the last access of this register
0 = A remote fault condition has not been detected since the last access of this register. (RMTF bit 4
of the status register was set by rising edge of a remote fault)
JABI — Jabber Interrupt
1 = A jabber condition has been detected since the last access of this register
0 = A jabber condition has not been detected since the last access of this register (JABD bit 1 of the
status register was set by rising edge of jabber condition)
12.3.4.2 Proprietary Status Register
MII Register Address 17 (%10001)
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
R
0
LNK DPMD SPD
0
ANNC
PRCVD
ANC
MODE
0
0
PLR
0
0
0
0
0
W
RESET: 0
1
1
1
0
0
0 (1) 0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 12-16. Proprietary Status Register
Read: Anytime
Write:
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
365