MC9S12NE64CPVE Datasheet, PDF (58/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64 Device Overview

Chapter 1 MC9S12NE64 Device Overview
1.2.4.8 V_RH, V_RL — ATD Reference Voltage Input Pins
V_RH and V_RL are the reference voltage input pins for the analog-to-digital converter.
1.2.4.9 V_DDPLL, V_SSPLL — Power Supply Pins for PLL
Provides operating voltage and ground for the oscillator and the phase-locked loop. This allows the supply
voltage to the oscillator and PLL to be bypassed independently. This 2.5 V voltage is generated by the
internal voltage regulator. The internal voltage regulator is turned off, if V_DDR/V_REGEN is tied to ground.
Table 1-5. MC9S12NE64 Power and Ground Connection Summary
Mnemonic
V_DDR/V_REGEN
V_DDX1
V_DDX2
V_SSX1
V_SSX2
V_DDA
V_SSA
V_RH
V_RL
PHY_VDDTX
PHY_VDDRX
PHY_VDDA
PHY_VSSTX
PHY_VSSRX
PHY_VSSA
V_DD1
V_DD2
V_SS1
V_SS2
V_DDPLL
V_SSPLL
Nominal
Voltage
3.3 V
Description
External power and ground, supply to internal voltage regulator.
To disable voltage regulator attach V_REGEN to V_SSX.
3.3 V
0V
External power and ground, supply to pin drivers.
3.3 V
0V
3.3 V
0V
Operating voltage and ground for the analog-to-digital converter, the
reference for the internal voltage regulator and the digital-to-analog
converters, allows the supply voltage to the A/D to be bypassed
independently.
Reference voltage high for the analog-to-digital converter.
Reference voltage low for the analog-to-digital converter.
2.5 V
0V
Internal power and ground generated by internal regulator for internal
Ethernet Physical Transceiver (EPHY). These also allow an external
source to supply the EPHY voltages and bypass the internal voltage
regulator.
2.5 V
0V
2.5 V
0V
Internal power and ground generated by internal regulator. These also
allow an external source to supply the core V_DD/V_SS voltages and
bypass the internal voltage regulator.
Provide operating voltage and ground for the phase-locked loop. This
allows the supply voltage to the PLL to be bypassed independently.
Internal power and ground generated by internal regulator.
NOTE
All V_SS pins must be connected together in the application. Because fast
signal transitions place high, short-duration current demands on the power
supply, use bypass capacitors with high-frequency characteristics and place
them as near to the MCU as possible. Bypass requirements depend on MCU
pin load.
MC9S12NE64 Data Sheet, Rev 1.0
58
Freescale Semiconductor