MC9S12NE64CPVE Datasheet, PDF (350/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64 Device Overview

Chapter 12 Ethernet Physical Transceiver (EPHYV2)
12.2.4 PHY_RXN — EPHY Twisted Pair Input –
Ethernet twisted-pair input pin. This pin is high-impedance out of reset.
12.2.5 PHY_RBIAS — EPHY Bias Control Resistor
Connect a 1.0% external resistor, RBIAS (see Electrical Characteristics chapter), between the
PHY_RBIAS pin and analog ground. Place this resistor as near to the chip pin as possible. Stray
capacitance must be kept to less than 10 pF (>50 pF will cause instability). No high-speed signals are
permitted in the region of RBIAS.
12.2.6 PHY_VDDRX, PHY_VSSRX — Power Supply Pins for EPHY Receiver
Power is supplied to the EPHY receiver through PHY_VDDRX and PHY_VSSRX. This 2.5 V supply is
derived from the internal voltage regulator. There is no static load on those pins allowed. The internal
voltage regulator is turned off, if V_DDR is tied to ground.
12.2.7 PHY_VDDTX, PHY_VSSTX — Power Supply Pins for EPHY
Transmitter
External power is supplied to the EPHY transmitter through PHY_VDDTX and PHY_VSSTX. This 2.5 V
supply is derived from the internal voltage regulator. There is no static load on those pins allowed. The
internal voltage regulator is turned off, if V_DDR is tied to ground.
12.2.8 PHY_VDDA, PHY_VSSA — Power Supply Pins for EPHY Analog
Power is supplied to the EPHY PLLs through PHY_VDDA and PHY_VSSA. This 2.5 V supply is derived
from the internal voltage regulator. There is no static load on those pins allowed. The internal voltage
regulator is turned off, if V_DDR is tied to ground.
12.2.9 COLLED — Collision LED
Flashes in half-duplex mode when a collision occurs on the network if EPHYCTL0 LEDEN bit is set.
12.2.10 DUPLED — Duplex LED
Indicates the duplex of the link, which can be full-duplex or half-duplex if EPHYCTL0 LEDEN bit is set.
12.2.11 SPDLED — Speed LED
Indicates the speed of a link, which can be 10 Mbps or 100 Mbps if EPHYCTL0 LEDEN bit is set.
12.2.12 LNKLED — Link LED
Indicates whether a link is established with another network device if EPHYCTL0 LEDEN bit is set.
MC9S12NE64 Data Sheet, Rev. 1.1
350
Freescale Semiconductor