MC9S12NE64CPVE Datasheet, PDF (483/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64 Device Overview

Memory Map and Register Definition
PAGSEL
x0
x1
Table 18-13. Comparator C Compares
EXTCMP Compare
No compare
EXTCMP[5:0] = XAB[21:16]
High-Byte Compare
DBGCCH[7:0] = AB[15:8]
DBGCCH[7:0] = XAB[15:14],AB[13:8]
18.3.2.7 Debug Control Register 2 (DBGC2)
7
R
BKABEN¹
W
6
FULL
5
BDM
4
TAGAB
3
BKCEN²
2
TAGC²
1
RWCEN²
0
RWC²
Reset
0
0
0
0
0
0
0
0
1 _{When BKABEN is set (BKP mode), all bits in DBGC2 are available. When BKABEN is cleared and DBG is used in DBG mode,}
bits FULL and TAGAB have no meaning.
2 _{These bits can be used in BKP mode and DBG mode (when capture mode is not set in LOOP1) to provide a third breakpoint.}
Figure 18-13. Debug Control Register 2 (DBGC2)
Table 18-14. DBGC2 Field Descriptions
Field
Description
7
BKABEN
6
FULL
5
BDM
4
TAGAB
3
BKCEN
2
TAGC
Breakpoint Using Comparator A and B Enable — This bit enables the breakpoint capability using comparator
A and B, when set (BKP mode) the DBGEN bit in DBGC1 cannot be set.
0 Breakpoint module off
1 Breakpoint module on
Full Breakpoint Mode Enable — This bit controls whether the breakpoint module is in dual mode or full mode.
In full mode, comparator A is used to match address and comparator B is used to match data. See
Section 18.4.1.2, “Full Breakpoint Mode,” for more details.
0 Dual address mode enabled
1 Full breakpoint mode enabled
Background Debug Mode Enable — This bit determines if the breakpoint causes the system to enter
background debug mode (BDM) or initiate a software interrupt (SWI).
0 Go to software interrupt on a break request
1 Go to BDM on a break request
Comparator A/B Tag Select — This bit controls whether the breakpoint will cause a break on the next instruction
boundary (force) or on a match that will be an executable opcode (tagged). Non-executed opcodes cannot cause
a tagged breakpoint.
0 On match, break at the next instruction boundary (force)
1 On match, break if/when the instruction is about to be executed (tagged)
Breakpoint Comparator C Enable Bit — This bit enables the breakpoint capability using comparator C.
0 Comparator C disabled for breakpoint
1 Comparator C enabled for breakpoint
Note: This bit will be cleared automatically when the DBG module is armed in loop1 mode.
Comparator C Tag Select — This bit controls whether the breakpoint will cause a break on the next instruction
boundary (force) or on a match that will be an executable opcode (tagged). Non-executed opcodes cannot cause
a tagged breakpoint.
0 On match, break at the next instruction boundary (force)
1 On match, break if/when the instruction is about to be executed (tagged)
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
483