MC9S12NE64CPVE Datasheet, PDF (81/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64 Device Overview

Memory Map and Register Definition
2.3.2.6 Flash Protection Restrictions
The general guideline is that Flash protection can only be added and not removed. Table 2-13 specifies all
valid transitions between Flash protection scenarios. Any attempt to write an invalid scenario to the
FPROT register will be ignored and the FPROT register will remain unchanged. The contents of the
FPROT register reflect the active protection scenario. See the FPHS and FPLS descriptions for additional
restrictions.
Table 2-13. Flash Protection Scenario Transitions
From
To Protection Scenario¹
Protection
Scenario
0
1
2
3
4
5
6
7
0
X
X
X
X
1
X
X
2
X
X
3
X
4
X
X
5
X
X
X
X
6
X
X
X
X
7
X
X
X
X
X
X
X
X
1 _{Allowed transitions marked with X.}
2.3.2.7 Flash Status Register (FSTAT)
The FSTAT register defines the operational status of the module.
7
6
5
4
3
2
1
0
R
CCIF
0
BLANK
0
0
CBEIF
PVIOL
ACCERR
W
Reset
1
1
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-9. Flash Status Register (FSTAT - Normal Mode)
7
6
5
4
3
2
1
0
R
CCIF
0
BLANK
0
CBEIF
PVIOL
ACCERR
FAIL
W
Reset
1
1
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-10. Flash Status Register (FSTAT - Special Mode)
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
81