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MC9S12NE64CPVE Datasheet, PDF (71/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64 Device Overview
Memory Map and Register Definition
Table 2-2. Detailed Flash Memory Map Summary
MCU Address
Range
PPAGE
Protectable Lower
Range
Protectable
Higher Range
0x4000-0x7FFF Unpaged
0x4000-0x41FF
N.A.
(0x3E)
0x4000-0x43FF
0x4000-0x47FF
0x4000-0x4FFF
0x8000-0xBFFF
0x3C
N.A.
N.A.
0x3D
N.A.
N.A.
0x3E
0x8000-0x81FF
N.A.
0x8000-0x83FF
0x8000-0x87FF
0x8000-0x8FFF
0x3F
N.A.
0xB800-0xBFFF
0xB000-0xBFFF
0xA000-0xBFFF
0x8000-0xBFFF
0xC000-0xFFFF Unpaged
N.A.
(0x3F)
0xF800-0xFFFF
0xF000-0xFFFF
0xE000-0xFFFF
0xC000-0xFFFF
1 Block Relative Address for 64 Kbyte Flash block consists of 16 address bits.
Block Relative
Address1
0x8000-0xBFFF
0x0000-0x3FFF
0x4000-0x7FFF
0x8000-0xBFFF
0xC000-0xFFFF
0xC000-0xFFFF
The Flash module also contains a set of 16 control and status registers located in address space module
base + 0x0000 to module base + 0x000F. A summary of these registers is given in Table 2-3 while their
accessibility in normal and special modes is detailed in Section 2.3.2, “Register Descriptions”.
Table 2-3. Flash Register Map
Module
Base +
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
Register Name
Flash Clock Divider Register (FCLKDIV)
Flash Security Register (FSEC)
RESERVED11
Flash Configuration Register (FCNFG)
Flash Protection Register (FPROT)
Flash Status Register (FSTAT)
Flash Command Register (FCMD)
Flash Control Register (FCTL)
Flash High Address Register (FADDRHI)1
Flash Low Address Register (FADDRLO)1
Normal Mode
Access
R/W
R
R
R/W
R/W
R/W
R/W
R
R
R
MC9S12NE64 Data Sheet, Rev. 1.1
Freescale Semiconductor
71