MC9S12NE64CPVE Datasheet, PDF (522/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64 Device Overview

Appendix A Electrical Characteristics
Table A-13. PLL Characteristics
Conditions are shown in Table A-4 unless otherwise noted
Num C
Rating
Symbol Min
Typ
Max
1
P Self clock mode frequency
f_SCM
1
5.5
2
D VCO locking range
f_VCO
8
50
3
D Lock detector transition from acquisition to
|∆_trk|
3
4
tracking mode
4
D Lock detection
|∆_Lock|
0
1.5
5
D Unlock detection
|∆_unl|
0.5
2.5
6
D Lock detector transition from tracking to
|∆_unt|
6
8
acquisition mode
7
C _{PLLON total stabilization delay (auto mode)} ² t_stab
0.5
8
D _{PLLON acquisition mode stabilization delay} ²
t_acq
0.3
9
D _{PLLON tracking mode stabilization delay} ²
t_al
0.2
10
D Fitting parameter VCO loop gain
11
D Fitting parameter VCO loop frequency
12
D Charge pump current acquisition mode
13
D Charge pump current tracking mode
14
C _{Jitter fit parameter 1}²
K₁
f₁
| i_ch |
| i_ch |
j₁
–100
60
38.5
3.5
1.1
15
C _{Jitter fit parameter 2}²
j₂
0.13
1 _{% deviation from target frequency}
2 _{fREF = 25 MHz, fBUS = 25 MHz equivalent fVCO = 50 MHz: REFDV = #$00, SYNR = #$00, Cs = 4700 pF,}
Cp = 470 pF, Rs = 2.2 kΩ.
Unit
MHz
MHz
%¹
%¹
%¹
%¹
ms
ms
ms
MHz/V
MHz
µA
µA
%
%
MC9S12NE64 Data Sheet, Rev. 1.1
522
Freescale Semiconductor