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| MC9S12NE64CPVE Datasheet, PDF (52/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64 Device Overview | |||
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Chapter 1 MC9S12NE64 Device Overview
1.2.3.28 PH5 / KWH5 / MII_TXEN â Port H I/O Pin 5
PH5 is a general-purpose I/O pin. When the EMAC MII external interface is enabled, it becomes the
transmit enabled (MII_TXEN) signal. It can be conï¬gured to generate an interrupt (KWH5) causing the
MCU to exit stop or wait mode. While in reset and immediately out of reset, the PH5 pin is conï¬gured as
a high-impedance input pin. See the port integration module (PIM) PIM_9NE64 block description chapter
and the EMAC block description chapter for information about pin conï¬gurations.
1.2.3.29 PH4 / KWH4 / MII_TXCLK â Port H I/O Pin 4
PH4 is a general-purpose I/O pin. When the EMAC MII external interface is enabled, it becomes the
transmit Clock (MII_TXCLK) signal. It can be conï¬gured to generate an interrupt (KWH4) causing the
MCU to exit stop or wait mode. While in reset and immediately out of reset, the PH4 pin is conï¬gured as
a high-impedance input pin. See the port integration module (PIM) PIM_9NE64 block description chapter
and the EMAC block description chapter for information about pin conï¬gurations.
1.2.3.30 PH3 / KWH3 / MII_TXD3 â Port H I/O Pin 3
PH3 is a general-purpose I/O pin. When the EMAC MII external interface is enabled, it becomes the
transmit data (MII_TXD3) signal. It can be conï¬gured to generate an interrupt (KWH3) causing the MCU
to exit stop or wait mode. While in reset and immediately out of reset, the PH3 pin is conï¬gured as a
high-impedance input pin. See the port integration module (PIM) PIM_9NE64 block description chapter
and the EMAC block description chapter for information about pin conï¬gurations.
1.2.3.31 PH2 / KWH2 / MII_TXD2 â Port H I/O Pin 2
PH2 is a general-purpose I/O pin. When the EMAC MII external interface is enabled, it becomes the
transmit data (MII_TXD2) signal. It can be conï¬gured to generate an interrupt (KWH2) causing the MCU
to exit stop or wait mode. While in reset and immediately out of reset, the PH2 pin is conï¬gured as a
high-impedance input pin. See the port integration module (PIM) PIM_9NE64 block description chapter
and the EMAC block description chapter for information about pin conï¬gurations.
1.2.3.32 PH1 / KWH1 / MII_TXD1 â Port H I/O Pin 1
PH1 is a general-purpose I/O pin. When the EMAC MII external interface is enabled, it becomes the
transmit data (MII_TXD1) signal. It can be conï¬gured to generate an interrupt (KWH1) causing the MCU
to exit stop or wait mode. While in reset and immediately out of reset, the PH1 pin is conï¬gured as a
high-impedance input pin. See the port integration module (PIM) PIM_9NE64 block description chapter
and the EMAC block description chapter for information about pin conï¬gurations.
1.2.3.33 PH0 / KWH0 / MII_TXD0 â Port H I/O Pin 0
PH0 is a general-purpose I/O pin. When the EMAC MII external interface is enabled, it becomes the
transmit data (MII_TXD0) signal. It can be conï¬gured to generate an interrupt (KWH0) causing the MCU
to exit stop or wait mode. While in reset and immediately out of reset, the PH0 pin is conï¬gured as a
high-impedance input pin. See the port integration module (PIM) PIM_9NE64 block description chapter
and the EMAC block description chapter for information about pin conï¬gurations.
MC9S12NE64 Data Sheet, Rev 1.0
52
Freescale Semiconductor
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