MC9S12NE64CPVE Datasheet, PDF (242/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64 Device Overview

Chapter 8 Serial Communication Interface (SCIV3)
8.4 Functional Description
This subsection provides a complete functional description of the SCI block, detailing the operation of the
design from the end user’s perspective in a number of descriptions.
Figure 8-11 shows the structure of the SCI module. The SCI allows full duplex, asynchronous, serial
communication between the CPU and remote devices, including other CPUs. The SCI transmitter and
receiver operate independently, although they use the same baud rate generator. The CPU monitors the
status of the SCI, writes the data to be transmitted, and processes received data.
IREN
RXD ^{INFRARED Ir_RXD}
RECEIVE
DECODER
BUS
CLOCK
BAUD RATE
GENERATOR
SBR12–SBR0
÷16
T8
SCI DATA
REGISTER
SCRXD
RECEIVE
SHIFT REGISTER
RECEIVE
AND WAKEUP
CONTROL
RE
RWU
LOOPS
RSRC
DATA FORMAT
CONTROL
M
WAKE
ILT
PE
PT
TRANSMIT
CONTROL
TRANSMIT
SHIFT REGISTER
TE
LOOPS
SBK
RSRC
SCI DATA
REGISTER
R16XCLK
R32XCLK
R8
NF
FE
PF
RAF
ILIE
IDLE
IDLE
RDRF
OR
RIE
TIE
TDRE
TC
TCIE
SCTXD
TDRE
TC
INFRARED
TRANSMIT
ENCODER
Ir_TXD
TNP[1:0] IREN
Figure 8-11. Detailed SCI Block Diagram
SCI
Interrupt
Request
TXD
MC9S12NE64 Data Sheet, Rev. 1.1
242
Freescale Semiconductor