English
Language : 

MC9S12NE64CPVE Datasheet, PDF (372/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64 Device Overview
Chapter 12 Ethernet Physical Transceiver (EPHYV2)
A 2.5 MHz internal clock is used for nibble wide transactions. A 10 MHz internal clock is used for serial
transactions.
TX MII
PARALLEL
TO
SERIAL
MANCHESTER
ENCODER
DIGITAL
FILTER
PHY_TXN
PHY_TXP
CARRIER
SENSE
JABBER
DIGITAL
LOOPBACK
(bit 0.14)
LINE TRANSMITTER/
LINE RECEIVER
RX
MII
SERIAL
TO
PARALLEL
MANCHESTER
DECODER
AND
TIMING
RECOVERY
POLARITY
CHECK
SQUELCH
Figure 12-21. 10BASE-T Block Diagram
PHY_RXN
PHY_RXP
Parallel to Serial: Converts the 4-bit wide nibbles from the MII to serial format before the information is
processed by subsequent blocks.
Manchester Encoder: Allows encoding of both the clock and data in one bit stream. A logical one is
encoded as a zero when the clock is high and a one when the clock is low. A logical zero is encoded as a
one when the clock is high and a zero when the clock is low.
Digital Filter: Performs pre-emphasis and low pass filtering of the input Manchester data.
DAC: Converts the digital data to an analog format before transmission on the media.
Carrier Sense: In half-duplex operation, carrier is asserted when either the transmit or receive medium is
active. In full-duplex operation, carrier asserted only on reception of data. During receive, carrier sense is
asserted during reception of a valid preamble, and de-asserted after reception of an EOF.
Loopback: Enabled when bit 0.14 is asserted. This loopback mode allows for the Manchester encoded and
filtered data to be looped back to the squelch block in the receive path. All the 10BASE-T digital functions
are exercised during this mode. The transmit and receive channels are disconnected from the media.
MII loopback (18.13) must be disabled to allow for correct operation of the digital loopback (0.14).
Link Generator: Generates a 100 ns duration pulse at the end of every 12 ms period of the transmission
path being idle (TXEN de-asserted). This pulse is used to keep the 10BASE-T link operational in the
absence of data transmission.
MC9S12NE64 Data Sheet, Rev. 1.1
372
Freescale Semiconductor