MC9S12NE64CPVE Datasheet, PDF (40/554 Pages) Freescale Semiconductor, Inc – MC9S12NE64 Device Overview

Chapter 1 MC9S12NE64 Device Overview
The PRTIDH register is constructed of four hexadecimal digits (0xABCD) as follows:
Digit “A” = Family ID
Digit “B” = Memory ID (flash size)
Digit “C” = Major mask revision
Digit “D” = Minor mask revision
Currently, family IDs are:
0x0 = D family
0x1 = H family
0x2 = B family
0x3 = C family
0x4 = T family
0x5 = E family
0x6 = reserved
0x7 = reserved
0x8 = NE family
Current memory IDs are:
0x0 = 256K
0x1 = 128K
0x2 = 64K
0x3 = 32K
0x4 = 512K
The major and minor mask revision increments from 0x0 as follows:
• Major mask increments on a complete (full/all layer) mask change.
• Minor mask increments on a single or smaller than full mask change.
The device memory sizes are located in two 8-bit registers MEMSIZ0 and MEMSIZ1 (addresses $001C
and $001D after reset). Table 1-3 shows the read-only values of these registers. See the module mapping
and control (MMC) block description chapter for further details.
Table 1-3. Memory Size Registers
MC9S12NE64
MC9S12NE64
Register Name
MEMSIZ0
MEMSIZ1
Value
$03
$80
1.2 Signal Description
This section describes signals that connect off-chip. It includes a pinout diagram, a table of signal
properties, and detailed discussion of signals.
MC9S12NE64 Data Sheet, Rev 1.0
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Freescale Semiconductor