W90P710CD Datasheet, PDF (83/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
W90P710
A[21:0]
D[31:0]
nECSn
nWE
nOE
nWBE_SDQM[1]
nWBE_SDQM[0]
2Mx16 SRAM
A[21:0]
DQ[15:0]
nCS
nWE
nOE
nUB
nLB
Fig. 6.3.8 External IO bank with 16-bit SRAM
Clock Skew Control Register （CKSKEW）
Register
CKSKEW
Address
0xFFF0_1F00
R/W
Description
R/W Clock skew control register
Reset Value
0xXXXX_0018
31
30
29
28
27
DLH_CLK_REF
23
22
21
20
19
DLH_CLK_REF
15
14
13
12
11
RESVERED
7
6
5
4
3
DLH_CLK_SKEW
26
25
24
18
17
16
10
9
2
1
MCLK_O_D
8
SWPON
0
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Publication Release Date: September 19, 2006
Revision B2