W90P710CD Datasheet, PDF (237/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
6.9.3 SD Register Description
SD Gloal Control Register (SDGCR)
REGISTER ADDRESS
SDGCR 0xFFF0_7000
R/W
R/W
DESCRIPTION
SD Global Control Register
RESET VALUE
0x0000_0000
31
23
15
7
Reserved
30
29
22
21
14
13
Reserved
6
5
WrSel
28
27
26
Reserved
20
19
18
Reserved
12
11
10
4
3
2
DMARd DMAWr
25
17
9
RdSel
1
SWRST
24
16
8
0
SDEN
BITS
[31:11] Reserved
[10:8] RdSel
[6:4]
WrSel
DESCRIPTIONS
-
Read Select
This field indicates which of DMA or SD host controller can read data
from buffer 0 or buffer 1.
3’b000: DMA can read buffer 0 (Default)
3’b011: SD host controller can read buffer 0
3’b100: DMA can read buffer 1
3’b111: SD host controller can read buffer 1
Write Select
This field indicates which of DMA, SD host controller can write data into
buffer 0 or buffer 1.
3’b000: DMA can write buffer 0 (Default)
3’b011: SD host controller can write buffer 0
3’b100: DMA can write buffer 1
3’b111: SD host controller can write buffer 1
Publication Release Date: September 19, 2006
- 237 -
Revision B2