W90P710CD Datasheet, PDF (261/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
replaced with zero. Please refer to GPIO chapter to setting this register. This is only used for Sync-
type High Color TFT because it’s databus is large over 8bit. Databus of other panel is only 8bit so
don’t need to setting this register.
VD
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
LCDBUS = 00
R[7:0]
G[7:0]
B[7:0]
LCDBUS = 01
0
R[7:2]
G[7:2]
B[7:2]
LCDBUS = 10
0
R[7:5]
G[7:5] B[7:6]
6.10.3.2 LCD Interrupt Control
There are enable register, clear register, status register for every interrupt type. Enable Mask set/clear
register will branch firmware into interrupt sub-routine. Firmware can read Status register to identify
which interrupt generate now. Write Clear register will clear the interrupt status. Status register will be
set even if firmware disable the Enable register. Main-routine can read Status register and write Clear
register.
LCD Interrupt Enable Register (LCDINTENB)
REGISTER
ADDRESS
R/W
DESCRIPTION
RESET VALUE
LCDINTENB 0xFFFF0_0004 R/W LCD interrupt enable
0x0000_0000
31
30
23
22
15
14
7
6
Reserved
29
28
21
20
Reserved
13
12
5
HSEN
4
VSEN
27
Reserved
19
11
Reserved
3
VLFINEN2
26
18
UNDREN2
10
2
VFFINEN2
25
17
UNDREN1
9
1
VLFINEN1
24
16
AHBEREN
8
0
VFFINEN1
Publication Release Date: September 19, 2006
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Revision B2