W90P710CD Datasheet, PDF (378/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
AIC Source Control Registers (AIC_SCR1 ~ AIC_SCR31)
REGISTER
AIC_SCR1
AIC_SCR2
ADDRESS R/W
DESCRIPTION
0xFFF8_2004 ^R/W Source Control Register 1
0xFFF8_2008 ^R/W Source Control Register 2
RESET VALUE
0x0000_0047
0x0000_0047
yyy
yyy
yyy
yyy
yyy
AIC_SCR28 0xFFF8_2070 ^R/W Source Control Register 28
AIC_SCR29 0xFFF8_2074 ^R/W Source Control Register 29
AIC_SCR30 0xFFF8_2078 ^R/W Source Control Register 30
AIC_SCR31 0xFFF8_207C ^R/W Source Control Register 31
31
30
29
28
27
26
RESERVED
23
22
21
20
19
18
RESERVED
15
14
13
12
11
10
RESERVED
7
6
5
4
3
2
SRCTYPE
RESERVED
0x0000_0047
0x0000_0047
0x0000_0047
0x0000_0047
25
24
17
16
9
8
1
0
PRIORITY
BITS
[31:8]
[7:6]
Reserved
SRCTYPE
Reserved
DESCRIPTIONS
Interrupt Source Type
Whether an interrupt source is considered active or not by the AIC is
subject to the settings of this field. Interrupt sources other than nIRQ0,
nIRQ1, nIRQ2, nIRQ3, should be configured as level sensitive during
normal operation unless in the testing situation.
SRCTYPE [7:6]
Interrupt Source Type
0
0
Low-level Sensitive
0
1
High-level Sensitive
1
0
Negative-edge Triggered
1
1
Positive-edge Triggered
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