W90P710CD Datasheet, PDF (542/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
LCDC Control Register Map, continued.
REGISTER
ADDRESS
Lookup Table SRAM
0xFFF0_0100
…
0xFFF0_84FF
R/W
DESCRIPTION
R/W Look-Up Table RAM
RESET VALUE
0xXXXX_XXXX
Audio Control Register Map
REGISTER
ADDRESS R/W
DESCRIPTION
ACTL_CON
0xFFF0_9000 R/W Audio controller control register
ACTL_RESET
ACTL_RDSTB
0xFFF0_9004 R/W
0xFFF0_9008 R/W
ACTL_RDST_LENGTH 0xFFF0_900C R/W
ACTL_RDSTC
ACTL_RSR
ACTL_PDSTB
0xFFF0_9010 R
0xFFF0_9014 R/W
0xFFF0_9018 R/W
ACTL_PDST_LENGTH 0xFFF0_901C R/W
ACTL_PDSTC
ACTL_PSR
0xFFF0_9020 R
0xFFF0_9024 R/W
Sub block reset control register
DMA destination base address
register for record
DMA destination length register for
record
DMA destination current address
register for record
Record status register
DMA destination base address
register for play
DMA destination length register for
play
DMA destination current address
register for play
Play status register
ACTL_IISCON
0xFFF0_9028 R/W IIS control register
ACTL_ACCON
0xFFF0_902C R/W AC-link control register
ACTL_ACOS0
0xFFF0_9030 R/W AC-link out slot 0
ACTL_ACOS1
0xFFF0_9034 R/W AC-link out slot 1
ACTL_ACOS2
0xFFF0_9038 R/W AC-link out slot 2
ACTL_ACIS0
0xFFF0_903C R AC-link in slot 0
ACTL_ACIS1
0xFFF0_9040 R AC-link in slot 1
ACTL_ACIS2
0xFFF0_9044 R AC-link in slot 2
RESET VALUE
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0004
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0080
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Cache Controller Test Registers Map
REGISTER ADDRESS R/W
DESCRIPTION
CTEST0 0xFFF6_0000 R/W Cache test register 0
CTEST1 0xFFF6_0004 R Cache test register 1
RESET VALUE
0x0000_0000
0x0000_0000
Publication Release Date: September 19, 2006
- 543 -
Revision B2