W90P710CD Datasheet, PDF (68/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
6.3.2.3 SDRAM Interface
A [2 1 :0 ]
D [3 1 :0 ]
MCLK
MCKE
n S C S [1 :0 ]
nSRAS
nSCAS
nSW E
nSDQ M [3:0]
A [1 0 :0 ]
A13
A14
nSCS0
nSDQ M [3:0]
A [1 0 :0 ]
BS0
BS1
D Q [[3 1 :0 ]
CLK
CKE
nCS
nRAS
nCAS
nW E
DQM [3:0]
W 90P710
SDRAM
64Mb 512Kx4x32
Fig 6.3.1 SDRAM Interface
6.3.3 EBI Control Registers Map
REGISTER
EBICON
ROMCON
ADDRESS
0xFFF0_1000
0xFFF0_1004
R/W
DESCRIPTION
R/W EBI control register
R/W ROM/FLASH control register
SDCONF0 0xFFF0_1008 R/W SDRAM bank 0 configuration register
SDCONF1 0xFFF0_100C R/W SDRAM bank 1 configuration register
SDTIME0 0xFFF0_1010 R/W SDRAM bank 0 timing control register
SDTIME1
EXT0CON
EXT1CON
EXT2CON
EXT3CON
CKSKEW
0xFFF0_1014
0xFFF0_1018
0xFFF0_101C
0xFFF0_1020
0xFFF0_1024
0xFFF0_1F00
R/W SDRAM bank 1 timing control register
R/W External I/O 0 control register
R/W External I/O 1 control register
R/W External I/O 2 control register
R/W External I/O 3 control register
R/W Clock skew control register (for testing)
RESET VALUE
0x0001_0000
0x0000_0XFC
0x0000_0800
0x0000_0800
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0xXXXX_0038
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