W90P710CD Datasheet, PDF (460/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

Continued
BITS
TOC2,
[2:0]
TOC1,
TOC0
W90P710CD/W90P710CDG
DESCRIPTIONS
TOC5, TOC4, TOC3 (Time Out Configuration) control 8 bit time-out
counter 0 configuration.
TOC2,
TOC1,
TOC0
value
000
001
010
011
100
OPERATION MODE
8 bit counter 0 is stopped
Counting the value stored in register TOIR 0 is started
after 001b is written in register in register TOC. An
interrupt is given if enabled, and bit TO0 is set within
register SCSR when the terminal count is reached. The
counter is stopped by writing 000b in register TOC, and
should be stopped before reloading new values in register
TOC.
Counter 0 starts counting the content of register TOIR0 on
the first START bit (reception or transmission) detected on
the pin I/O after 010b is written in register TOC. When
counter 0 reaches its terminal count, an interrupt is given if
enable. Bit TO0 in register SCSR is set. The counter is
reloaded with TOIR0 and starts counting on each
subsequent START bit. It is possible to change the
content of TOIR0 during a count; the current count will not
be affected and the new count value will be taken into
account at the next START bit. The count is stopped by
writing 000b in register TOC,
Counter 0 starts counting the content of register TOIR0 on
the first START bit (reception or transmission) detected on
the pin I/O after 010b is written in register TOC. When
counter 0 reaches its terminal count, an interrupt is given if
enable. Bit TO0 in register SCSR is set. The count is
stopped by writing 000b in register TOC,
Same as value 000b, except that counter 0 will be stopped
at the end of the 12^th ETU following the first START bit
detected after 100b has been written in register TOC
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