W90P710CD Datasheet, PDF (543/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
UART0 Control Registers Map
REGISTER
ADDRESS R/W
DESCRIPTION
UART0_RBR 0xFFF8_0000 R Receive Buffer Register (DLAB = 0)
UART0_THR 0xFFF8_0000 W Transmit Holding Register (DLAB = 0)
UART0_IER 0xFFF8_0004 R/W Interrupt Enable Register (DLAB = 0)
UART0_DLL
Divisor Latch Register (LS)
0xFFF8_0000 R/W
(DLAB = 1)
Divisor Latch Register (MS)
UART0_DLM 0xFFF8_0004 R/W
(DLAB = 1)
UART0_IIR 0xFFF8_0008 R Interrupt Identification Register
UART0_FCR 0xFFF8_0008 W FIFO Control Register
UART0_LCR 0xFFF8_000C R/W Line Control Register
UART0_LSR 0xFFF8_0014 R Line Status Register
UART0_TOR 0xFFF8_001C R Time Out Register
RESET VALUE
Undefined
Undefined
0x0000_0000
0x0000_0000
0x0000_0000
0x8181_8181
Undefined
0x0000_0000
0x6060_6060
0x0000_0000
High Speed UART1 Control Registers Map
REGISTER
ADDRESS R/W
DESCRIPTION
UART1_RBR 0xFFF8_0100 R Receive Buffer Register (DLAB = 0)
UART1_THR 0xFFF8_0100 W Transmit Holding Register (DLAB = 0)
UART1_IER
UART1_DLL
0xFFF8_0104 R/W
0xFFF8_0100 R/W
UART1_DLM
UART1_IIR
0xFFF8_0104 R/W
0xFFF8_0108 R
Interrupt Enable Register (DLAB = 0)
Divisor Latch Register (LS)
(DLAB = 1)
Divisor Latch Register (MS)
(DLAB = 1)
Interrupt Identification Register
UART1_FCR 0xFFF8_0108 W FIFO Control Register
UART1_LCR 0xFFF8_010C R/W Line Control Register
UART1_MCR 0xFFF8_0110 R/W Modem Control Register
UART1_LSR 0xFFF8_0114 R Line Status Register
UART1_MSR 0xFFF8_0118 R MODEM Status Register
UART1_TOR 0xFFF8_011C R Time Out Register
UART1_UBCR 0xFFF8_0120 R/W UART1 Bluetooth Control Register
RESET VALUE
Undefined
Undefined
0x0000_0000
0x0000_0000
0x0000_0000
0x8181_8181
Undefined
0x0000_0000
0x0000_0000
0x6060.6060
0x0000_0000
0x0000_0000
0x0000_0000
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