W90P710CD Datasheet, PDF (451/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
Smart Card Host Status Register (SCHI_SCSR)
REGISTER
SCHI_SCSR0
SCHI_SCSR1
ADDRESS
0xFFF8_5014
0xFFF8_5814
R/W
DESCRIPTION
R Smart card Status Register 0
R Smart card Status Register 1
RESET VALUE
0x0000_0060
0x0000_0060
31
23
15
7
SC_RESET
30
29
22
21
14
13
RESERVED
6
5
TSRE
TBRE
28
27
RESERVED
20
19
RESERVED
12
11
4
SBD
3
NSER
26
25
18
17
10
TOF2
2
PBER
9
TOF1
1
OER
24
16
8
TOF0
0
RDR
BITS
[31:11]
RESERVED
[10:8]
TOF2,
TOF1,
TOF0
[7]
SC_RESET
[6]
TSRE
DESCRIPTIONS
RESERVED
TOF2 is Time-Out Flag of Timer2.
When Timer 2 time out, it will set the FLAG (TOF2)
When host reads SCSR, it clears this bit to "0".
TOF1 is Time-Out Flag of Timer1.
When Timer 1 time out, it will set the FLAG (TOF1)
When host reads SCSR, it clears this bit to "0".
TOF0 is Time-Out Flag of Timer0.
When Timer 0 time out, it will set the FLAG (TOF0)
When host reads SCSR, it clears this bit to "0".
SC_RESET pin status
This bit reflects the RESET pin high or low.
Transmitter Shift Register Empty
This bit is set to "1" when transmitter shift register is empty.
Publication Release Date: September 19, 2006
- 451 -
Revision B2