W90P710CD Datasheet, PDF (262/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
BITS
[31:19]
[18]
[17]
[16]
[15:6]
[5]
[4]
[3]
[2]
[1]
[0]
Reserved
UNDREN2
UNDREN1
AHBEREN
Reserved
HSEN
VSEN
VLFINEN2
VFFINEN2
VLFINEN1
VFFINEN1
DESCRIPTIONS
Reserved
FIFO2 UNDERRUN interrupt enable
FIFO1 UNDERRUN interrupt enable
AHB ERROR interrupt enable
Reserved
HSYNC interrupt enable
VSYNC interrupt enable
FIFO2 VLINE FINISH interrupt enable
FIFO2 VFRAME FINISH interrupt enable
FIFO1 VLINE FINISH interrupt enable
FIFO1 VFRAME FINISH interrupt enable
LCD Interrupt Status Register (LCDINTS)
REGISTER
ADDRESS
R/W
DESCRIPTION
LCDINTS
0xFFF0_8008
R LCD interrupt status
RESET VALUE
0x0000_0000
31
30
23
22
15
14
7
6
Reserved
29
21
Reserved
13
5
HSIS
28
27
Reserved
20
19
12
4
VSIS
11
Reserved
3
VLFINIS2
26
18
UNDRIS2
10
2
VFFINIS2
25
17
UNDRIS1
9
1
VLFINIS1
24
16
AHBERIS
8
0
VFFINIS1
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