W90P710CD Datasheet, PDF (271/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
31
30
29
23
22
21
15
14
13
7
6
5
Reserved
28
27
26
F2STRIDE[15:8]
20
19
18
F2STRIDE[7:0]
12
11
10
Reserved
4
3
2
F2LOCK
F2BURSTY
25
24
17
16
9
8
1
0
F2TRANSZ
BITS
[31:16]
[15:5]
[4]
[3:2]
[1:0]
F2STRIDE
Reserved
F2LOCK
F2BURSTY
F2TRANSZ
DESCRIPTIONS
Video frame buffer stride
16-bit value specifies the word offset of memory address of vertically
adjacent line for FIFO2 fetching.
Reserved
FIFO2 lock transfer enable
0 = Disable
1 = Enable
FIFO2 burst transfer type
00 =4 data burst mode
01 =8 data burst mode
10 =16 data burst mode
FIFO2 data width per-transfer
00=one byte
01=half word
10=one word
FIFO1 Start Address Register (FIFO1SADDR)
REGISTER
FIFO1SADDR
ADDRESS
0xFFF0_8030
R/W
DESCRIPTION
R/W FIFO1 start address
RESET VALUE
0x0000_0000
31
30
29
28
27
26
25
24
FIFO1SADDR[31:24]
23
22
21
20
19
18
17
16
FIFO1SADDR[23:16]
15
14
13
12
11
10
9
8
FIFO1SADDR[15:8]
7
6
5
4
3
2
1
0
FIFO1SADDR[7:0]
Publication Release Date: September 19, 2006
- 271 -
Revision B2