W90P710CD Datasheet, PDF (544/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
UART2 Control Register Map
REGISTER ADDRESS R/W
UART2_RBR 0xFFF8_0200 R
UART2_THR 0xFFF8_0200 W
UART2_IER 0xFFF8_0204 R/W
UART2_DLL 0xFFF8_0200 R/W
UART2_DLM 0xFFF8_0204 R/W
UART2_IIR 0xFFF8_0208 R
UART2_FCR 0xFFF8_0208 W
UART2_LCR 0xFFF8_020C R/W
UART2_MCR 0xFFF8_0210 R/W
UART2_LSR 0xFFF8_0214 R
UART2_MSR 0xFFF8_0218 R
UART2_TOR 0xFFF8_021C R
UART2_IRCR 0xFFF8_0220 R/W
DESCRIPTION
Receive Buffer Register (DLAB = 0)
Transmit Holding Register (DLAB = 0)
Interrupt Enable Register (DLAB = 0)
Divisor Latch Register (LS)
(DLAB = 1)
Divisor Latch Register (MS)
(DLAB = 1)
Interrupt Identification Register
FIFO Control Register
Line Control Register
Modem Control Register
Line Status Register
MODEM Status Register
Time Out Register
IrDA Control Register
RESET VALUE
Undefined
Undefined
0x0000_0000
0x0000_0000
0x0000_0000
0x8181_8181
Undefined
0x0000_0000
0x0000_0000
0x6060_6060
0x0000_0000
0x0000_0000
0x0000_0040
UART3 Control Register Map
REGISTER ADDRESS R/W
UART3_RBR 0xFFF8_0300 R
UART3_THR 0xFFF8_0300 W
UART3_IER 0xFFF8_0304 R/W
UART3_DLL 0xFFF8_0300 R/W
UART3_DLM 0xFFF8_0304 R/W
UART3_IIR 0xFFF8_0308 R
UART3_FCR 0xFFF8_0308 W
UART3_LCR 0xFFF8_030C R/W
UART3_MCR 0xFFF8_0310 R/W
UART3_LSR 0xFFF8_0314 R
UART3_MSR 0xFFF8_0318 R
UART3_TOR 0xFFF8_031C R
DESCRIPTION
Receive Buffer Register (DLAB = 0)
Transmit Holding Register (DLAB = 0)
Interrupt Enable Register (DLAB = 0)
Divisor Latch Register (LS)
(DLAB = 1)
Divisor Latch Register (MS)
(DLAB = 1)
Interrupt Identification Register
FIFO Control Register
Line Control Register
Modem Control Register
Line Status Register
MODEM Status Register
Time Out Register
RESET VALUE
Undefined
Undefined
0x0000_0000
0x0000_0000
0x0000_0000
0x8181_8181
Undefined
0x0000_0000
0x0000_0000
0x6060_6060
0x0000_0000
0x0000_0000
Publication Release Date: September 19, 2006
- 545 -
Revision B2