W90P710CD Datasheet, PDF (51/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
BITS
[31:30]
[29:24]
[23:0]
DESCRIPTION
PACKAGE
Package Type Select
These two bits are power-on setting latched from pin D[9:8]
Package [31:30]
1
1
Package Type
176-pin Package
VERSION Version of chip
CHIPID The chip identifier 0x090.0710
Arbitration Control Register (ARBCON)
REGISTER ADDRESS
ARBCON _{0xFFF0_0004}
R/W
DESCRIPTION
R/W ^{Arbitration Control Register}
31
30
29
28
27
26
23
22
21
RESERVED
20
19
18
15
14
13
RESERVED
12
11
10
7
6
5
RESERVED
4
3
2
RESERVED
IPACT
RESET VALUE
0x0000_0000
25
24
17
16
9
8
1
IPEN
0
PRTMOD
BITS
[31:3]
[2]
[1]
[0]
RESERVED
IPACT
IPEN
PRTMOD
DESCRIPTION
-
Interrupt priority active.
When IPEN=”1”, this bit will be set when the ARM core has an
unmasked interrupt request. This bit is available only when the
PRTMOD=0.
Interrupt priority enable bit
0 = the ARM core has the lowest priority.
1 = enable to raise the ARM core priority to second
This bit is available only when the PRTMOD=0.
Priority mode select
0 = Fixed Priority Mode (default)
1 = Rotate Priority Mode
- 51 -
Publication Release Date: September 19, 2006
Revision B2