W90P710CD Datasheet, PDF (303/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
LCD Timing Control 5 Register (LCDTCON5)
REGISTER
ADDRESS
R/W
DESCRIPTION
LCDTCON5 0xFFF0_80C0 R/W LCD Timing Control 5
RESET VALUE
0x0000_0000
31
30
29
23
22
21
Reserved
15
14
13
7
6
5
Reserved
28
27
Reserved
20
19
12
11
Reserved
4
3
MMODE INVVCLK
26
18
ACBF
10
2
INVHSYN
25
17
9
1
INVVSYN
24
16
8
0
INVVDEN
BITS
[31:21]
Reserved
[20:16] ACBF
[15:5] Reserved
[4]
MMODE
[3]
INVVCLK
[2]
INVHSYNC
[1]
INVVSYNC
[0]
INVVDEN
DESCRIPTIONS
Reserved
Determine the toggle rate of the VDEN AC bias pin).The AC bias pin
frequency is only applicable to STN display. Program this field with
the number of line clocks between each toggle.
Reserved
Determine the toggle rate of the VDEN
0 = Each Frame
1 = The rate defined by the ACBF.
This bit controls the polarity of the VCLK active edge.
0 = Panel signal is transit at VCLK rising edge
1 = Panel signal is transit at VCLK falling edge
This bit indicates the HSYNC pulse polarity.
0 = Normal
1 = Inverted
This bit indicates the VSYNC pulse polarity.
0 = Normal
1 = Inverted
This bit indicates the VDEN signal polarity.
0 = Normal
1 = Inverted
Publication Release Date: September 19, 2006
- 303 -
Revision B2