W90P710CD Datasheet, PDF (530/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
7.3.11 PS2 Interface AC Characteristics
T3
T4
PS2_CLK
1st
CLK
2nd
CLK
T1
T2
PS2_DATA ^{Start Bit}
Bit 0
10th
CLK
11th
CLK
T5
Parity Bit
Timing for data received from the auxiliary device
PS2_CLK
T7 T8
1st
2nd
9th
CLK
CLK
CLK
10th
CLK
11th
CLK
PS2_DATA
T9
Bit 0
Parity Bit _{STOP Bit}
Timing for data send to the auxiliary device
SYMBOL
T1
T2
T3
T4
T5
T7
T8
T9
DESCRIPTION
MIN.
Time from DATA transition to falling edge of CLK
5
Time form rising edge of CLK to DATA transition
5
Duration of CLK inactive
30
Duration of clock active
30
Time to auxiliary device inhibit after clock 11 to ensure the
auxiliary device does not start another transmission
0
Duration of CLK inactive
30
Duration of CLK active
30
Time to fom inactive to active CLK transition, used to time
when the auxiliary device samples DATA
30
MAX.
25
T4-5
50
50
UNIT
us
us
us
us
50
us
50
us
50
us
50
us
Publication Release Date: September 19, 2006
- 531 -
Revision B2