W90P710CD Datasheet, PDF (383/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
AIC Interrupt Mask Register (AIC_IMR)
REGISTER ADDRESS R/W
DESCRIPTION
AIC_IMR 0xFFF8_2114 ^R Interrupt Mask Register
RESET VALUE
0x0000_0000
31
IM31
23
IM23
15
IM15
7
IM7
30
IM30
22
IM22
14
IM14
6
IM6
29
IM29
21
IM21
13
IM13
5
IM5
28
IM28
20
IM20
12
IM12
4
IM4
27
IM27
19
IM19
11
IM11
3
IM3
26
IM26
18
IM18
10
IM10
2
IM2
25
IM25
17
IM17
9
IM9
1
IM1
24
IM24
16
IM16
8
IM8
0
RESERVED
BITS
[31:1]
[0]
IM x
Reserved
DESCRIPTIONS
IMx: Interrupt Mask
This bit determines whether the corresponding interrupt channel is
enabled or disabled. Every interrupt channel can be active no matter
whether it is enabled or disabled. If an interrupt channel is enabled, it
does not definitely mean it is active. Every interrupt channel can be
authorized by the AIC only when it is both active and enabled.
0 = Corresponding interrupt channel is disabled
1 = Corresponding interrupt channel is enabled
Reserved
AIC Output Interrupt Status Register (AIC_OISR)
REGISTER ADDRESS R/W
DESCRIPTION
AIC_OISR 0xFFF8_2118 ^R Output Interrupt Status Register
RESET VALUE
0x0000_0000
31
30
29
28
27
26
25
24
RESERVED
23
22
21
20
19
18
17
16
RESERVED
15
14
13
12
11
10
9
8
RESERVED
7
6
5
4
3
2
1
0
RESERVED
IRQ
FIQ
Publication Release Date: September 19, 2006
- 383 -
Revision B2