W90P710CD Datasheet, PDF (198/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
BITS
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DESCRIPTIONS
Reserved
RUM_CLKI
Interrupt enable for RESUME (for clock is stopped)
0: Disable
1: Enable
RST_ENDI
Interrupt enable for USB reset end
0: Disable
1: Enable
USB_CGI
USB_BTI
CVSI
CDII
CDOI
VENI
CLAI
GSTRI
Interrupt Enable for Device Configured
0: Disable
1: Enable
Note: the interrupt occurs when device configured or dis-configured.
Interrupt Enable for USB Bus Transition
0: Disable
1: Enable
Interrupt Enable Control for Status Phase of Class or Vendor Command
0: Disable
1: Enable
Interrupt Enable Control for Data-In of Class or Vendor Command
0: Disable
1: Enable
Interrupt Enable Control for Data-Out of Class or Vendor Command
0: Disable
1: Enable
Interrupt Enable Control for USB Vendor Command
0: Disable
1: Enable
Interrupt Enable Control for USB Class Command
0: Disable
1: Enable
Interrupt Enable Control for USB Get_String_Descriptor Command
0: Disable
1: Enable
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