W90P710CD Datasheet, PDF (180/552 Pages) Winbond – 32-BIT ARM7TDMI-BASED MCU

W90P710CD/W90P710CDG
BITS
[31]
[30]
[29:7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
MIE
OCE
Reserved
RHSCE
FNOE
UREE
RDTE
SOFE
WDHE
SCHOE
DESCRIPTION
MasterInterruptEnable
Global interrupt disable. A write of ‘1’ disables all interrupts.
OwnershipChangeEnable
0: Ignore
1: Disable interrupt generation due to Ownership Change.
Reserved. Read/Write 0's
RootHubStatusChangeEnable
0: Ignore
1: Disable interrupt generation due to Root Hub Status Change.
FrameNumberOverflowEnable
0: Ignore
1: Disable interrupt generation due to Frame Number Overflow.
UnrecoverableErrorEnable
This event is not implemented. All writes to this bit will be ignored.
ResumeDetectedEnable
0: Ignore
1: Disable interrupt generation due to Resume Detected.
StartOfFrameEnable
0: Ignore
1: Disable interrupt generation due to Start of Frame.
WritebackDoneHeadEnable
0: Ignore
1: Disable interrupt generation due to Write-back Done Head.
SchedulingOverrunEnable
0: Ignore
1: Disable interrupt generation due to Scheduling Overrun.
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