MC68HC912DG128 Datasheet, PDF (90/452 Pages) Motorola, Inc – Microcontrollers

Operating Modes
Freescale Semiconductor, Inc.
NDRF — Narrow Data Bus for Register-Following Map Space
This bit enables a narrow bus feature for the 1K 512 byte Register-
Following Map. This is useful for accessing 8-bit peripherals and
allows 8-bit and 16-bit external memory devices to be mixed in a
system. In Expanded Narrow (eight bit) modes, Single Chip Modes,
and Peripheral mode, this bit has no effect.
0 = Makes Register-Following MAP space act as a full 16 bit data bus.
1 = Makes the Register-Following MAP space act the same as an 8
bit only external data bus (data only goes through port A externally).
The Register-Following space is mapped from $0400 to $07FF after
reset, which is next to the register map. If the registers are moved this
space follows.
RFSTR1, RFSTR0 — Register Following Stretch
This two bit field determines the amount of clock stretch on accesses
to the 1K byte Register Following Map. It is valid regardless of the
state of the NDRF bit. In Single Chip and Peripheral Modes this bit
has no meaning or effect.
Table 5-6. RFSTR Stretch Bit Definition
RFSTR1
RFSTR0
Number of E Clocks
Stretched
0
0
0
0
1
1
1
0
2
1
1
3
Technical Data
90
MC68HC912DG128 — Rev 3.0
Operating Modes
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