MC68HC912DG128 Datasheet, PDF (193/452 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Pulse Width Modulator
Introduction
CLOCK SOURCE
(ECLK or Scaled ECLK)
GATE
(CLOCK EDGE SYNC)
PWENx
SYNC
PWCNTx
CENTR = 1
RESET
(DUTY CYCLE)
8-BIT COMPARE =
PWDTYx
(PERIOD)
8-BIT COMPARE =
PWPERx
FROM PORT P
DATA REGISTER
T
Q
MUX
Q
PPOLx
MUX
TO PIN
DRIVER
PPOL = 1
PPOL = 0
PWDTY
(PWPER − PWDTY) × 2
PWPER × 2
PWDTY
Figure 12-2. Block Diagram of PWM Center-Aligned Output Channel
MC68HC912DG128 — Rev 3.0
MOTOROLA
Pulse Width Modulator
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Technical Data
193