MC68HC912DG128 Datasheet, PDF (85/452 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Operating Modes
Internal Resource Mapping
5.5.4 Flash EEPROM mapping through internal Memory Expansion
The Page Index register or PPAGE provides memory management for
the MC68HC912DG128. PPAGE consists of three bits to indicate which
physical location is active within the windows of the MC68HC912DG128.
The MC68HC912DG128 has a user’s program space window, a register
space window for Flash module registers, and a test program space
window.
The user’s program page window consists of 16K Flash EEPROM bytes.
One of eight pages is viewed through this window for a total of 128K
accessible Flash EEPROM bytes.
On the MC68HC912DG128, the register space window consists of a 4-
byte register block. One of four pages is viewed through this window for
each of the 32K flash module register blocks of MC68HC912DG128.
The test mode program page window consists of 32K Flash EEPROM
bytes. One of the four 32K byte arrays is viewed through this window for
a total 128K accessible Flash EEPROM bytes. This window is only
available in special mode for test purposes and replaces the user’s
program page window.
MC68HC912DG128 has a five pin port, Port K, for emulation and for
general purpose I/O. Three pins are used to emulate the three page
indices (PPAGE bits) and one pin is used as an emulation chip select.
When these four pins are not used for emulation they serve as general
purpose I/O pins. The fifth Port K pin is used as a general purpose I/O
pin.
5.5.5 Program space expansion
There are 128K bytes of Flash EEPROM. With a 64K byte address
space, the PPAGE register is needed to perform on-chip memory
expansion. A program space window of 16K byte pages is located from
$8000 to $BFFF. Three page indices are used to point to one of eight
different 16K byte pages. They can be viewed as expanded addresses
x16, x15 and x14.
MC68HC912DG128 — Rev 3.0
MOTOROLA
Operating Modes
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Technical Data
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