MC68HC912DG128 Datasheet, PDF (211/452 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Enhanced Capture Timer
Introduction
Load holding register and reset pulse accumulator
PT0
Edge detector
Delay counter
EDG0
0
8-bit PAC0 (PACN0)
PT1
Edge detector
Delay counter
EDG1
PA0H holding register
Interrupt
0
8-bit PAC1 (PACN1)
PT2
Edge detector
PA1H holding register
Delay counter
EDG2
0
8-bit PAC2 (PACN2)
PT3
Edge detector
Delay counter
EDG3
PA2H holding register
Interrupt
0
8-bit PAC3 (PACN3)
PA3H holding register
Figure 13-3. 8-Bit Pulse Accumulators Block Diagram
MC68HC912DG128 — Rev 3.0
MOTOROLA
Enhanced Capture Timer
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Technical Data
211