MC68HC912DG128 Datasheet, PDF (133/452 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Technical Data — MC68HC912DG128
Section 9. Resets and Interrupts
9.1 Contents
9.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
9.3 Maskable interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
9.4 Latching of Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
9.5 Interrupt Control and Priority Registers . . . . . . . . . . . . . . . . . 135
9.6 Interrupt test registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
9.7 Resets. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137
9.8 Effects of Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
9.9 Register Stacking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
9.10 Important User Information . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
9.2 Introduction
CPU12 exceptions include resets and interrupts. Each exception has an
associated 16-bit vector, which points to the memory location where the
routine that handles the exception is located. Vectors are stored in the
upper 128 bytes of the standard 64K byte address map.
The six highest vector addresses are used for resets and non-maskable
interrupt sources. The remainder of the vectors are used for maskable
interrupts, and all must be initialized to point to the address of the
appropriate service routine.
MC68HC912DG128 — Rev 3.0
MOTOROLA
Resets and Interrupts
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Technical Data
133