MC68HC912DG128 Datasheet, PDF (402/452 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Electrical Specifications
3. Reduced drive must be off to meet these timings.
4. Unequalled loading of pins will affect relative timing numbers.
5. This characteristic is affected by clock stretch.
Add N × t_cyc where N = 0, 1, 2, or 3, depending on the number of clock stretches.
6. Without TAG enabled.
ECLK
1
2
3
16
17
18
R/W
LSTRB
(W/O TAG ENABLED)
READ
ADDRESS/DATA
MULTIPLEXED
19
5
10
WRITE
20
21
7
ADDRESS
ADDRESS
23
22
8
9
13
11
DATA
15
DATA
12
14
DBE
NOTE: Measurement points shown are 20% and 70% of V_DD
24
25
26
Figure 19-10. Multiplexed Expansion Bus Timing Diagram
Technical Data
402
MC68HC912DG128 — Rev 3.0
Electrical Specifications
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