MC68HC912DG128 Datasheet, PDF (15/452 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Technical Data — MC68HC912DG128
List of Figures
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Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
MC68HC912DG128 Pin Assignments in 112-pin QFP. . . . . . . 38
112-pin QFP Mechanical Dimensions (case no987) . . . . . . . . 39
PLL Loop FIlter Connections . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Common Crystal Connections . . . . . . . . . . . . . . . . . . . . . . . . . 43
External Oscillator Connections . . . . . . . . . . . . . . . . . . . . . . . . 43
Memory Map after reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Memory Paging. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .94
Access Type vsBus Control Pins . . . . . . . . . . . . . . . . . . . . . . . 96
Program Sequence Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Erase Sequence Flow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
STOP Key Wake-up Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
Internal Clock Relationships . . . . . . . . . . . . . . . . . . . . . . . . . . 157
PLL Functional Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . .158
Clock Loss during Normal Operation . . . . . . . . . . . . . . . . . . .162
No Clock at Power-On Reset . . . . . . . . . . . . . . . . . . . . . . . . . 164
STOP Exit and Fast STOP Recovery . . . . . . . . . . . . . . . . . . . 167
Clock Generation Chain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
Clock Chain for SCI0, SCI1, RTI, COP. . . . . . . . . . . . . . . . . . 181
Clock Chain for ECT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182
Clock Chain for MSCAN, SPI, ATD0, ATD1 and BDM . . . . . . 183
Block Diagram of PWM Left-Aligned Output Channel . . . . . . 192
Block Diagram of PWM Center-Aligned Output Channel . . . . 193
PWM Clock Sources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194
Timer Block Diagram in Latch Mode. . . . . . . . . . . . . . . . . . . . 209
Timer Block Diagram in Queue Mode. . . . . . . . . . . . . . . . . . . 210
8-Bit Pulse Accumulators Block Diagram . . . . . . . . . . . . . . . . 211
16-Bit Pulse Accumulators Block Diagram . . . . . . . . . . . . . . .212
MC68HC912DG128 — Rev 3.0
MOTOROLA
List of Figures
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Technical Data
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