MC68HC912DG128 Datasheet, PDF (73/452 Pages) Motorola, Inc – Microcontrollers

Registers
Freescale Semiconductor, Inc.
Address Bit 7
6
5
4
3
2
1
Bit 0
Name
$031B AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0 C1IDAR7
$031C AM7
AM6
AM5
AM4
AM3
AM2
AM1
AM0 C1IDMR4
$031D AM7
AM6
AM5
AM4
AM3
AM2
AM1
AM0 C1IDMR5
$031E AM7
AM6
AM5
AM4
AM3
AM2
AM1
AM0 C1IDMR6
$031F AM7
AM6
AM5
AM4
AM3
AM2
AM1
AM0 C1IDMR7
$0320–
$033C
Unimplemented⁽⁴⁾
Reserved
$033D
0
0
0
0
0
0
PUPCAN RDPCAN PCTLCAN1
$033E PCAN7 PCAN6 PCAN5 PCAN4 PCAN3 PCAN2 TxCAN RxCAN PORTCAN1
$033F DDCAN7 DDCAN6 DDCAN5 DDCAN4 DDCAN3 DDCAN2
0
0
DDRCAN1
$0340–
$034F
FOREGROUND RECEIVE BUFFER 1
RxFG1
$0350–
$035F
TRANSMIT BUFFER 10
Tx10
$0360–
$036F
TRANSMIT BUFFER 11
Tx11
$0370–
$037F
TRANSMIT BUFFER 12
Tx12
$0380-
$03FF
Unimplemented⁽⁴⁾
Reserved
= Reserved or unimplemented bits.
Table 4-1. Register Map (Sheet 10 of 10)
1. Port A, port B and data direction registers DDRA, DDRB are not in map in expanded and peripheral modes.
2. Port E and DDRE not in the map in peripheral and expanded modes with EME set.
3. Registers also not in map in peripheral mode.
4. Data read at these locations is undefined.
5. Port K and DDRK not in the map in peripheral and expanded modes with EMK set.
Technical Data
73
MC68HC912DG128 — Rev 3.0
Registers
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